Intermetallic Growth Rate is Strongly Temperature Dependent

Folks,

In a previous post, I discussed that, contrary to popular belief, intermetallic compounds (IMCs) formed in soldering processes are not necessarily brittle. I reviewed some literature that indicated that failure modes are usually at interfaces between the IMCs themselves, the IMCs and the copper or solder and often in the bulk solder itself. The perspective that IMC growth may not significantly affect reliability is also supported by work performed by Lee, et al. Figure 1, from Lee’s paper, shows that aging for 250 hrs at 150°C does not significantly affect characteristic life in thermal cycle testing.

Figure 1. Aging for up to 250 hours at 150°C did not significantly affect characteristic life in thermal cycle testing in Lee’s referenced paper.

However, it would be prudent to minimize the thickness of IMCs. So this raises the question: how quickly do IMCs grow at any given temperature? Work performed by Siewert, et al[i] holds the answer. In this paper, Siewert supported past work that the thickness of IMCs grows as X=(kt)0.5 and added new data to support modeling using this equation. In this equation, X is IMC growth distance, k is a constant dependent on temperature, and t is the time. One might expect that X is strongly dependent on temperature (T) and it is. Using data from Siewert’s paper, I was able to generate values of k as a function of T and plot them in an Arrhenius plot. See Figure 2.

Figure 2. An Arrhenius plot for k.

 

I next used Figure 2 to obtain a value of k at 70°C and plotted the IMC growth X in microns as a function of time in hours. The result is in Figure 3.

 

Figure 3. IMC grow as a function of time at 70°C.

Note that about 40 years are required to obtain a little over 10 microns of growth. Figure 4 shows the results for IMC growth at 200°C. In this case, only 100 hours are required to obtain about 10 microns of growth. So going from 70 to 200°C produces an acceleration factor of over 30,000 in the effective IMC growth rate to 10 microns.

Figure 4. IMC growth as a function of time at 200°C.

These are theoretical calculations from data collected at different temperatures. Let’s see if the formulas work in real life. In another paper [ii]by Ma, et al. his team aged some solder joints at 125°C for 120 hours. The equations used above would predict IMC growth of 2.2 microns under these conditions. From Figure 5, we see about 2 microns of growth consistent with the calculation estimate.

Figure 5. Images from Ma’s paper of IMC growth at 125°C for 120 hours.

So although IMCs are not that brittle, it is wise to limit their growth. Hence, limiting exposure to very high temperature aging is wise, but certainly minimizing solder rework is advisable, as the molten solder enables very fast IMC growth.

Cheers,

Dr. Ron

[i] Siewert, T. A., et al, Formation and Growth of IMs at the Interface Between Lead Free Solders and Copper Interfaces, IPC Apex, 1994.

[ii] X. Ma, et al Materials Letters 57 (2003) 3361-3365.

Power Distribution – To Route, or to Plane

Power distribution on a PCB can come in a number of forms. The three most common methods are:

  • Route power and ground.
  • Use surface layer floods.
  • Use internal planes.

After component positioning, you’ll need to look at power and ground distribution. With a two-layer board, your options are limited to individually routing power and ground, or using a polygon fill, also called a flood or pour.

 

 

 

 

For simple low-speed layouts, it’s common to route power just like any other signal. You’ll typically use a wider trace, which you can set manually, or with design rules. Drawing a polygon in the board shape, and giving it the same name as your power or ground signals may make the job easier. Keep in mind though, that you can end up with parts of a ground plane disconnected from the rest of the board. This is called an orphan. Some CAD error checks will spot such a problem and some won’t.

I made that mistake not long ago, as describe in this blog post.

If you have a four (or more) layer board, common practice is to designate one of the internal layers for ground, and one for power.

 

 

 

 

 

 

Doing so can leave more room for signal routing, can reduce EMI, and can leave a cleaner-looking, easier-to-debug board. It also reduces the chances of having orphan ground or power areas, as I warned against in the prior post.

Duane Benson
Chocolate layer cake with coconut frosting will not help with EMI

http://blog.screamingcircuits.com/

The Monster in Munich

Productronica was, as usual, slightly surreal. The enormity of it cannot be overstated. Attendance at the Munich-based event was up 20% from two years ago to 44,000, per exhibition officials, although it’s not clear how many of those visitors were for SemiCon Europa, which colocated  with the biennial show for the first time. Still, for those in the market for new equipment, or just perusing to see the trends, there was more than enough to keep them busy the four full days. For a full report, click here.

 

 

Basic Layout — Aligning Components

Not long ago, I designed an Arduino compatible clock board. The board has 12 NeoPixel (digital addressed RGB LEDs) arranged around the board to act as hour hands. The minutes and seconds are represented by an external ring of 60 NeoPixels.

 

 

 

 

 

 

 

 

 

 

How did I go about positioning the 12 NeoPixels, and what does it matter? For aesthetic reasons, I do want each NeoPixel in the proper place. If any are off a bit, I’ll notice every time I look at the clock.

I created a triangle, with all of the correct distances, and drew in in my CAD software’s Document layer. The Document layer looks just like a silk screen layer, when visible, but it won’t be printed on the board. You can use this layer to put in extra information for yourself, or for the manufacturer.

 

 

 

 

 

 

 

 

 

 

You’ll notice that I also wrote in the document layer “No tabs here.” That’s an instruction to the board fabricator to not put a panel tab where the micro USB connector goes. If it did, the board wouldn’t be buildable when panelized.

Some create a fabrication document layer and an assembly document layer. An example might pertain to reference designators. If the board is too compact for reference designators, of if, for aesthetic reasons, you want to leave them off the finished board, You can put the reference designators in an Assembly Documentation layer. Then be sure to let your assembler know what you’ve done.

The other things I did here is to keep all the LEDs aligned with the baseline of the PCB. In theory, you can place a component at any rotation angle you want. But, like any system, manufacturing works better when there are fewer variables.

You reduce the probability of error if you keep components aligned at factors of 90 degrees. It also helps to keep polarities oriented the same way, as much as possible. For example, if you can, have all the diode polarities facing the same direction.

Duane Benson
Time flies like an arrow; fruit flies like a banana

http://blog.screamingcircuits.com

Productronica Recap, Day 1

From the floors of the Messe International Fairgrounds in Munich, home to the Productronica, Mike Buetow reports on the biennial trade show and the latest equipment inspecting electronics assemblies. And it is everywhere: There are more than 40 companies offering surface inspection, 28 showing AOI, and another 20 with x-ray machines.

Live, from Productronica!

We will be reporting from the Productronica trade show in Munich next week. For the uninitiated, Productronica is the largest electronics assembly show in the world, filling more than six halls the sizes of aircraft hangers at the Messe Fairgrounds.

Each day, I’ll report what I saw and heard at the show for our new podcast, PCB Chat. Tune in at upmg.podbean.com for the recaps. And for real-time updates, follow me on Twitter (twitter.com/mikebuetow). And if you are headed to the show, feel free to drop me a line at mbuetow@upmediagroup.com or connect with me via LinkedIn.

Safe travels!

 

How to Land That Job in an Interview

Folks,

It’s a stressful time when you are interviewing for a job. As a former manager at IBM, Universal Instruments, and Cookson Electronics, I have interviewed more than 300 people for jobs. I’ve also interviewed for a few myself. As a result of these experiences, years ago some management friends and I collaborated on some of the best job interviewing tips.

Having taught about 3,000 students at Dartmouth over the last 15 years, I typically give a lecture on the last day of class entitled, “Tips for Success and How to Interview for a Job.” These Powerpoint slides have some of the ideas gleaned from what I learned above.

Some years ago I was interviewing for a job and the interviewing manager asked me, “Why should I give you this job?”

I answered without hesitation, “Because I led a team of engineers that contributed to the design and build this optoelectronic transceiver module.”

As I handed the optoelectronic transceiver module to the manager to look at, the non-verbal vibrations I received from him where very positive.

A few weeks after I got the job, he told me that handing him the hardware that I worked on was what sealed the deal.

Most of us recognize that an artist or writer should have a portfolio when they go on job interviews, but don’t appreciate that an engineer should have one too, even if like mine, it had only one item. I share this strategy with my current students and on a regular basis they tell me how this approach led to them getting a job.

Here is an email from a student who graduated more than 10 years ago, relating to a new job she just landed:

“I just wanted to thank you for a job interviewing tip from back when I was in school.  You suggested that we bring an example of something that we’ve worked on.  I’ve done that all these years, and I have to say, I’m pretty sure it’s gotten me several job offers!  I know at least one of my current employers’ interviewers definitely appreciated it.  Anyway, so thank you!”

So, hopefully you have a job you love and never have to interview again, but if you do, take something that you worked on as a “show and tell.” It also helps in that it focuses the interview on something you know about and will look good discussing.

BTW, if you would like a copy of my Powerpoint presentation mentioned above, send me a note (rlasky@indium.com) and I will send you a copy.

Cheers,

Dr. Ron

PCB Chat Episode 3 – Rick Hartley

For some 50 years, Rick Hartley has been an engineer and designer of printed circuit boards, primarily with BF Goodrich and L3 Avionics. He is now principal of RHartley Enterprises, where he consults with leading companies to resolve noise, signal integrity and EMI problems. Perhaps the most popular speaker in the history of PCB West, Rick recently has been conducting 2-day workshops on controlling signal noise. He talks EMI (“it’s about fields”) and his advice for designers with UPMG’s Mike Buetow.

In Memory of Jim

I can’t think of a better way to remember my good friend Jim Raby than a scholarship in his name. It seems all the more timely now. Thank you, David, Ellen and STI Electronics for setting this up, and congratulations to 2017 recipient Broxton Sanderson.

The Ideal Bill of Materials

A good portion of a quality build is simply the result of clear information. One of the more important pieces of information we deal with is the bill of materials, called “the BoM.”

The BoM is a list of all the components to be placed on the PCB. The file typically includes an index number, the number of times a specific component will be used on the board, the reference designator from the schematic, the component manufacturer, and the manufacturer’s part number.

If a specific component is used more than once – a common bypass capacitor, for example – it will still only take up one line in the BoM. One field in the BoM will list the number of times the component is used, and another field will list all the reference designators for that part number.

For example, line 5 in my BOM on this slide, is a 0.1 microfarad, 10V capacitor.

The first field in the table has a line item index, 5, because this is the fifth unique part number in my BoM. The next field has a quantity of this component used on the board, which is 5. Field three holds reference designators C1, C2, C3, C4 and C5. The next field has the manufacturer, and the final field has the manufacturer’s part number.

You will likely have additional fields, such as a distributor part number, a description, the package type and other tidbits, as I have here.

But the first five columns in this example show what is generally considered to be the minimum data set for a good bill of materials.

Note the three lines at the bottom highlighted in red with the label “DNS” in the Type column.

DNS means “do not stuff.” That’s an instruction to the manufacturer to not install that component during the assembly phase. Some people use DNP, for do not place, or DNI, for do not insert. It’s always best to consult with your manufacturer to get their preferred labeling.

You may also want to include alternate parts for components likely to go out of stock. Passives, such as capacitors and resistors, are notorious for going out of stock without notice. Invariably, though, a half dozen nearly identical parts will fit the bill just as well.

Create an alternates list so the purchasing folks or manufacturer won’t get stuck not knowing if a substitute is valid or not.

Duane Benson
In the 90’s, when people said good things were “the bom”, this is what they were talking about