Low-Temperature Reflow, High-Temperature Use

Folks,

Soldering enables modern electronics. Without solder, electronics would not exist. Copper melts at 1085°C, yet with solder, we can bond copper to copper at about 235°C or less with current lead-free solders. These lower temperatures are required, as electronic packages and PWBs are made of polymer materials that cannot survive temperatures much above 235°C.

Before the advent of RoHS, tin-lead solders melted at about 35°C less than lead-free solders. So today, soldering temperatures are at the highest in history. For some applications, it would be desirable to have solders that melted at closer to tin-lead temperatures. This desire has increased interest in low-melting point solders, such as tin-bismuth solders. Eutectic SnBi melts at 138°C, so reflow oven temperatures in the 170°C range can be used. These lower reflow temperatures are easier on some fragile components and PWBs and will reduce defects such as PWB popcorning and measling. However, the lower melting point of SnBi solders limits their application in many harsh environments, such as automobile and military applications. As a rule of thumb, a solder should not be used above 80 to 90% of its melting point on the Kelvin scale. For SnBi solder, this temperature range is 55.8 – 96.9°C. These temperatures are well below the use temperature of some harsh environments. In addition, SnBi solders can be brittle and thus perform poorly in drop shock testing.

So, the electronics world could use a solder that can reflow at a little over 200°C, but still have a high use temperature. This situation would appear to be an unsolvable conundrum. However, my colleagues at Indium, led by Dr. Ning-Cheng Lee, have solved it. They used an indium-containing solder powder, Powder A, that melts at <180°C and combined it with Powder B that melts at ~220°C. By reflowing at about 205°C, Powder A melts and Powder B is dissolved by the melted Powder A. To achieve this effect, the 205°C temperature must be held for approximately two minutes. The remelt temperature of the final solder joint is above 180°C. I discussed the phenomenon of a liquid metal dissolving another that melts at a higher temperature before. An extreme example of this effect is mercury dissolving gold at room temperature. So, don’t drop any gold or silver jewelry into a wave soldering pot and expect to fish it out an hour later!

Powder A would not be a candidate on its own as it displays some melting at 113°C and some at 140°C.

Using the criteria above, the use temperature of this new solder powder mix can be in the 89.4 – 134.7°C range, after reflow, as the remelt temperature is above 180°C. Tests performed by Dr. Lee and his team have shown the resulting solder joints also have good to excellent thermal cycling and drop shock performance.

Figures 1-3 show schematically how the melting of the two powders would melt at a peak reflow temperature of 205°C.

Figure 1.  Powder A and Powder B at room temperature.


Figure 2. At 205°C, Powder A has melted and it is starting to dissolve to Powder B.


Figure 3. After about a minute at 205°C, Powder B starts to dissolve. Given enough time, it will completely dissolve in Powder A, resulting in a new alloy that has a remelt temperature over 180°C, as well as good to excellent thermal cycle and drop shock performance. 

To me, this invention is one of the most significant in SMT in a generation. It could be argued that it is like finding the holy grail of soldering: melting at low-temperature with a service life at high-temperature.

Cheers,

Dr. Ron

PS. I developed an Excel spreadsheet to calculate the use temperatures. It converts degrees C into K. I used it to calculate the use temperatures above. If you would like a copy, send me a note at rlasky@indium.com.

When 2 is Better Than 5

Before we get too excited over TMSC’s 5nm chip foundry in Arizona — which, keep in mind, is only on the drawing board at this point — we are reminded the chip maker is working on a 2nm factory in Taiwan.

In fact, it could have 2 and 3nm processes online abroad before it even breaks ground in America.

The US needs to get in gear if it wants to be a leader in wafer production.

Reshoring, with a Catch

A trio of recent posts on manufacturing reshoring — or not — caught my eye.

It’s not happening. Writing in Forbes, Workbench chief executive Prince Ghosh points out that the US lacks the human capacity to fully actionize a return of mass production: “US manufacturing still suffers from problems of labor skills and wage costs. Tariffs have succeeded in lowering global dependency on Chinese manufacturing, but they have failed in driving manufacturing back to the US.” He has a point: It took China 20 years to build up the workforce needed to become the World’s Factory, and that’s even with a roughly 800 million or more citizen advantage over every nation but India.

And there’s no assumption investment in the US will go toward the truly leading edge technologies. To wit: If TMSC builds a 5nm semiconductor wafer fab plant in Arizona, as promised, it will still be behind the state-of-the-art 3nm node process expected to be available in 2022.

It’s happening. A more optimistic view comes from Nick Stonnington, a Forbes Councils Member,* says the US “has the potential to be one of the few countries in the world that is essentially self-contained from a manufacturing standpoint.” 

“Reshoring US manufacturing,” he adds, “would not only save enormous transportation costs; it would tie up less capital for less time. When you manufacture your product 5,000 miles away, you must spend extra time specializing your process to each market. In contrast, localized production facilitates just-in-time manufacturing, which optimizes workflow to more quickly produce a more specialized product for less capital investment. 

It’s happening, but not how you think. In Footprint 2020: Expansion and Optimization Approaches for US Manufacturers, consulting giant Deloitte says “the next shift in manufacturing locations is imminent,” but adds “some 98% of companies surveyed plan to either expand existing sites, or open new facilities, in countries with existing operations. This trend is true for virtually all types of facilities, from production to assembly to R&D. China and the US are anticipated to receive the highest number of existing country expansions.”

One topic, three views. Which do you agree with? And why?

*For the uninitiated, the Forbes Council is basically a network of bloggers who pay Forbes to publish their work. So take that for what it’s worth.

Heavenly Circuits

Jerry Falwell Jr. is in the news again, for salacious reasons that have nothing to do with electronics (I hope).

It seems like he’s having a bad week, and I’m certainly not going to pile on.

But mention of his name reminds me of the time I spoke with the son of the famous evangelist, and it was in my professional capacity as an editor, no less.

As I recall, I answered the phone one day — I can’t remember which year it was, but it would have been sometime around 2004 — to find a very professional voice on the line.

“Mr. Buetow?”

Yes.

“Would you have time to speak with Mr. Jerry Falwell Jr.?”

Umm, sure.

When JFJ came on, he was very polite and to the point. A gentleman in our industry — a printed circuit designer — had developed a concept for putting identical components on opposite sides of a board and running vias through to shorten the length of the connections. The designer, with whom I had spoken from time to time over the years, had offered the concept to Liberty University, where Falwell was vice chancellor. Mr. Falwell Jr. wanted my thoughts on whether Liberty should invest the monies to patent the idea.

I don’t recall what I told him, but a check of the USPTO shows that Liberty did follow through. A colleague reminded me representatives from Liberty actually attended PCB West one year as well to promote the mirror pinout concept. Still, I doubt they made much money off the idea, which has been overcome by other advances in component packaging anyway.

Whatever my advice to Mr. Falwell Jr. was, I hope it didn’t put him in a bad position with his trustees. I’m fairly confident it has nothing to do with the predicament he finds himself in now.

And if he calls me again, I’ll still be happy to talk. Provided we stick to electronics.

Tin Pest in Medieval Culture

Folks,

Readers may remember that I have had an interest in tin pest for some time. Tin pest can occur if nearly-pure tin is exposed to cold temperatures (<13.2oC) for long periods of time. At the end of this post, I provide a short summary of the tin pest phenomenon. See this striking time lapse video of tin pest forming; I assume the time period is over many months.

The reason for this post is that a medieval scholar, Beata Lipi?ska, from Poland is studying tin pest and its effects on medieval culture, most notably in church organ pipes. She has contacted me to see if I can help her find papers that discuss tin pest from a historical point of view. If readers have any references that could help Beata, please contact her directly at beata.e.lipinska@gmail.com.

Figure 1. Tin pest forms in Sn .05 Cu alloy from Plumbridge. See the paper referenced below.

What is Tin Pest?
Tin is a metal that is allotropic, meaning that it has different crystal structures under varying conditions of temperature and pressure. Tin has two allotropic forms. “Normal” or white beta tin has a stable, tetragonal crystal structure with a density of 7.31g/cm3. Upon cooling below 13.2oC, beta tin slowly turns into alpha tin. “Grey” or alpha tin has a cubic structure and a density of only 5.77g/cm3 . Alpha tin is also a semiconductor, not a metal. The expansion of tin from white to grey causes most tin objects to crumble.

The macro conversion of white to grey tin takes on the order of 18 months. The photo, which is likely the most famous modern photograph of tin pest, shows the phenomenon quite clearly.

This photo is titled “The Formation of Beta-Tin into Alpha-Tin in Sn-0.5Cu at T <10oC” and is referenced from a paper by Y. Karlya, C. Gagg, and W.J. Plumbridge, “Tin Pest in Lead-Free Solders,” in Soldering and Surface Mount Technology, 13/1 [2000] 39-40.

This phenomenon has been known for centuries and there are many interesting, probably apocryphal, stories about tin pest. Perhaps the most famous of stories is that of the tin buttons on Napoleon’s soldiers’ coats disintegrating from tin pest while on their retreat from Moscow. Another common anecdotal story during the middle ages was that Satan was to blame for the decline of the tin organ pipes in Northern European churches, as tin pest often looks like the tin has become “diseased”. 

Initially, tin pest was called “tin disease” or “tin plague”. I believe that the name “tin pest” came from the German translation for the word “plague” (i.e., in German, plague is “pest”).

To most people with a little knowledge of materials, the conversion of beta to alpha tin at colder temperatures seems counter-intuitive. Usually materials shrink at colder temperatures; they do not expand. Although it appears that the mechanism is not completely understood, it is likely due to the grey alpha tin having a lower entropy than white beta tin. With the removal of heat at the lower temperatures, a lower entropy state would likely be more stable.

Since the conversion to grey tin requires expansion, the tin pest will usually nucleate at an edge, corner, or surface. The nucleation can take 10’s of months, but once it starts, the conversion can be rapid, causing structural failure within months.

Although tin pest can form at <13.2oC, most researchers believe that the kinetics are very sluggish at this temperature. There seems to be general agreement in the literature that the maximum rate of tin pest formation occurs at -30o to -40oC.

Cheers,

Dr. Ron

Stencil Aperture Design for the Pin in Paste (PIP) Process

Peter writes,

Dear Dr. Ron,

I am trying to implement the Pin-in-Paste (PIP) process. The PWB is 63 mils thick, the component pin diameter is 47 mils, the PWB hole diameter is 87 mils, and the PWB pad diameter is 120 mils. I used the Indium StencilCoach software and the result said that I needed a stencil aperture with a 416 mil diameter for the 5 mil thick stencil I was using.

That stencil aperture diameter is way too big. What gives?

Best,

Peter

Dear Peter,

The issue is that your PWB hole diameter is too large. It is 40 mils greater than the component pin diameter. This situation results in a very large amount of solder required to fill the mostly empty PWB hole. See Figure 1. Since solder paste is about 50% by volume flux, quite a bit of paste is often needed to form a good solder joint.

Figure 1
Fig. 1. This figure is a cross-section schematic of a component mounted on a PWB. The fillet, hole, and pin volumes are shown and the resulting solder volume needed. If the component pin is much smaller than the PWB hole diameter, more solder paste will be needed than the pin-in-paste printing process can provide.

Chatting with my friends, Jim Hall and Phil Zarrow of ITM and Jim McLenaghan of Creyr Innovation, they all recommend that the PWB hole diameter be in the range of 10 to 12 mils larger than the pin diameter. In your case, this would be a hole diameter of 58 mils (I chose 11 mils greater than the pin diameter) and a PWB pad diameter of say 80 mils. The software calculates that a stencil aperture diameter of 194 mils is required (see Figure 2). It might be better to choose a square aperture of 172 mils on a side as seen in the output below. If this size stencil aperture is still too large, solder preforms can help. I will discuss using them in a future post.

Figure 2
Figure 2. The right hand column of this figure shows that a round stencil aperture diameter of 194 mils (2 x 97.184, the third cell from the bottom) is required to form a good solder joint in this application. It might be advantageous to use a square aperture of 172 mils on a side, as show in the fourth cell from the bottom in the right column.

By the way, Jim McLenaghan refined some earlier work that resulted in the formula for the fillet volume used in StencilCoach. Zarrow and Hall just released a book called Troubleshooting Electronic Assembly: Wisdom from the Board Talk Crypt. These three folks are some of the most knowledgeable people in electronics assembly today.

Cheers,

Dr. Ron

What is Slowing Down Your PCB Prototyping Production?

When it comes to releasing new technology, time is of the essence. New technology needs PCBs, and slowdowns will delay its release. In business, time is money, so delivering PCBs on time is vitally important.

Stated by a PCB manufacturer, if your PCB prototyping production time isn’t meeting the deadlines, then it’s time to look at what might be slowing you down. PCB production does not have to take long, as turnkey production has shown. A traditional PCB manufacturer might not be able to deliver at that speed, but there are steps you can take to improve efficiency.

Too Many Parties Involved

Prototyping is one of the lengthiest steps in assembly. Consider how long it can take to design, produce, and ship prototypes, especially when dealing with facilities all over the world. You can speed up your production by doing all your prototyping within your facility.

If your prototype does not work, then the process often has to be repeated. Each little fix requires the prototype sent to the designers, then to the production house, and then to the testing facility. Instead, these steps can be completed in one place.

Delays in Supply Shipping

Another common reason why prototyping is slow is that you don’t have the necessary supplies on hand. When you have to order supplies for each project, shipping issues will slow you down, especially if your supplies are sourced overseas. You did not only slow your production, but you also add tariffs into the mix.

Since you cannot control shipping, tariffs, or other supply-chain issues, you can avoid prototyping slowdowns by taking control of the accessories and supplies you have on hand. By sourcing supplies yourself and doing it ahead of time, you should be able to get better prices, especially if you do not need to pay for expedited shipping costs.

Outdated Technology

Some PCB manufacturers have outdated machinery. When your machinery is slow, prototyping slows down too. Some manufacturers are turning to CNC milling to speed their prototyping. With the correct programming, a CNC mill can make a prototype in a few hours, and larger models might take a little longer. Granted, it will not be as precise as the finished product. But, isn’t that what a prototype is?

Along with machinery, take a good look at your technology. If you haven’t upgraded your computers or software in several years, you may not be compatible with newer tech or with your clients. The age of your tech should seriously slow you down.

Incomplete Documentation Files

Some manufacturers have issues with prototypes because the collection of files is incomplete. Each PCB requires a package of documents with drill files, lists of materials, CAD files, Gerber files, and instructions and drawings. Without the complete list, the prototype will have missing pieces.

When manufacturers have to fill in the missing pieces, prototype production slows. Therefore, it is important that each project is highly organized, and the files needed for the project need to be accessible for everyone who works on it. This could be an issue with organization, communication, or delivery, and could be fixed by developing an organizational file structure that is stored in the cloud.

Contributed by Chris Dickey, vice president of sales and marketing at SVTronics

“Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications” – A Review

Everything you ever wanted to know about PCB transmission lines – and more – in a digestible format with just the right amount of math to back up the illuminating practical illustrations.


Ed.: Martyn Gaudion is managing director of Polar Instruments Ltd. He began his career at Tektronix in test engineering on high-bandwidth portable oscilloscopes. He joined Polar in 1990, where he was responsible for the design and development of the Toneohm 950, Polar’s multilayer PCB short circuit locator. He became CEO in 2010. He also develops tailored content for the Polar YouTube channel. He reviewed this book for PCD&F.

Hot off the virtual press – a copy of Dr. Eric Bogatin’s new guide to transmission line design appeared in my Artech eBook account.

Do we really need another transmission line book? That’s what Dr. Bogatin asks right at the outset. After reading this new tome from virtual cover to cover, yes we do. This is a thoroughly practical book an peppered with links to Bogatins’s brief informative video explanations which expand and add dynamic content in a way that printed matter alone cannot.

Whether you are a recent graduate who wants a more practical insight to the behavior of transmission lines after doing all the hard work of the pure math side of study, or an experienced electrical engineer moving into the high speed arena – or even a PCB technologist or fabricator wanting an insight into all the mysterious terminology that surrounds the subject – this is a resource book for you. It is equally valuable whether you are dipping into chapters of specific interest, or taking a deep breath and reading from (virtual) cover to cover.

In my day job I spend most of my time helping customers who are new to transmission lines ensure that they document and design them correctly for fabrication, and I confess over the years much is taken as given. By reading Bogatin’s new book I have gained insight into transmission line behavior that is very familiar but I didn’t know the why – and the why makes everything make more sense. 

It is staggering that the electrical behavior of a simple pair of copper traces with a sandwich of dielectric material can generate a book running to 600 pages without loss of interest, but this is exactly what Bogatin does with the subject. Along the way you will find out why you should always think of signal and return paths and not in terms of signal and ground. You will find that while the RF and digital design spaces may run at similar frequencies, the design considerations for both are poles apart. (No pun intended.) You will also discover that simulators and field solvers don’t design circuits – you do – and you best have an idea of what you intend to happen and the expected outcome before reaching for the simulator. Words are important, and Bogatin stresses that though digital and RF and EMC specialists all deal with high-speed signals – and a lot of the jargon is similar – there are often situations where technical terms overlap while their meanings don’t. Bogatin takes an important stance in defining and understanding the terminology to ensure you are understood when working across disciplines.

On measurement – there are many precision tools for measuring high speed signals and time and frequency domain information, all with accuracy beyond your dreams – but as with simulation – Bogatin cautions that unless you understand what you are measuring and how to design your test vehicle, any or all of that expensive equipment can lead you to the wrong answer. Time spent in the measurement section of the book is well invested and will enable you to extract the best possible measurements from whatever TDR/sampling oscilloscope/vector network analyzer you have to hand.

I personally like the examples where Bogatin mixes electronic timescales in nanoseconds with human relatable timescales (days) to bring tangible meaning to his explanations. I also like his informative section on why intuition in the frequency domain does not translate easily (at all?) to the time domain, and that while both are valid and useful you need to work with a degree of selective schizophrenia while working in these domains.

Last but not least, alongside the video links and examples are links to both evaluation versions of commercial tools and useful no cost utilities so you can run the simulations and experiment for yourself.

Martyn Gaudion, June 2020

Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications

by Dr. Eric Bogatin

Available from Artech House

The Area Ratio for Odd-Shaped Stencil Apertures

Joey writes:

Dear Dr. Ron,

I have a stencil aperture with an unusual shape. See Figure 1. How do I calculate the area ratio? The stencil thickness is 5 mils. The dimensions of the aperture are also in mils.

Figure 1. Joey’s Stencil Aperture

Joey,

The area ratio is simply the area of the stencil aperture opening divided by the area of the sidewalls. For common aperture geometries such as circles, squares, etc. it is easy to derive formulas. See Figure 2.

Figure 2. Formulas can be developed for common aperture shapes.

For an unusual shape like yours, it is easiest to simply calculate and divide the areas. From Figure 1, we get that area of the aperture opening as: 40*24+ the area of the two triangles. A little geometry (can you do it?) shows each triangle to have an area of 89 sq mils. So, the total area is 960 + 2*89 = 1138 sq mils. The perimeter is 40+24+16+16+28+12+16+16 = 168 mils, hence the area of the sidewalls is 168*5 = 840 sq mils. Therefore, the area ratio is 1138/840 = 1.355. Experience has shown that an area ratio of > 0.66 is needed for good solder paste transfer efficiency, so this stencil aperture will do well for transfer efficiency.

Careful thought would suggest that the triangular protrusions alone do not have a good area ratio. Calculations show their area ratios to be 0.37. So, the transfer efficiency in this part of the aperture might not be good. However, the area of the rectangle is so great, more than five times that of the triangles, as to alleviate this concern.

Dr. Ron



Autonomous Vehicles Even Farther Out in Time

Folks,

Readers of this blog will remember that I have been a skeptic of self-driving cars emerging in the near term. I am even less sanguine today. A recent article supports my perspective. Humans just do so many things effortlessly that sensors and computers cannot duplicate.

As an example, suppose there are five people at a street corner. These individuals non-verbally communicate intent that other humans easily pick-up on. If they are talking to each other and not facing the road, a human rightly concludes they are not planning on crossing. If they are facing the road and looking at the traffic, a human expects they plan to cross. This intuition is well beyond any AI’s ability to interpret and will be for decades to come.

Figure 1. A human recognizes that these students aren’t planning on crossing the street.

Autonomous vehicles are typically over designed to not cause accidents. Therefore, in some cases, if a pedestrian sticks their hand out into a road to wave at a self-driving car, it will stop. Whereas a human would recognize that the person is just goofing-off or being friendly.

All of this new information makes Elon Musk’s claim that Tesla will have a car on the road in 2022 without a steering wheel hard to accept.

To be fair, self-driving cars in controlled conditions, such as low traffic, well-marked routes, in good weather, will become more common in the decade ahead. However, an autonomous vehicle that can pick me up from my poorly marked 200 foot driveway, off an unmarked country road in Vermont, and then drive me to terminal C at Boston’s Logan airport is many decades away.

So, if you know someone who wants to be a truck driver, I feel that that will continue to be a fruitful career for a long time. In addition, those of us who manufacture electronics can take comfort in the fact that autonomous vehicles will need much more electronics than originally thought.

Cheers,

Dr. Ron