New Zuken Tool Offers Look, and Questions, for Future

SANTA CLARA, CA – What role will artificial intelligence truly play in electronics design, and what will the impact be on hardware engineers?

Zuken took a step toward answering that question today with its announcement at PCB West of a new AI-based tool for printed circuit place-and-route. Yet the first public mention of AIPR for CR-8000 – the actual rollout will come in the first quarter next year – poses not only a dramatic vision for a highly automated future of design but a host of new questions as well.

The new tool itself is an extension of Design Force, Zuken’s layout, routing and verification tool within the CR-8000 platform. It’s AI, explained Kyle Miller, Ph.D., who architected the engine, involves all three basic types of machine learning: supervised, unsupervised and reinforcement. AIPR stands for Autonomous Intelligent Place and Route, and like previously announced AI-based CAD tools, it starts with routing. The “Basic Brain” performs so-called smart routing by means of exposure to Zuken’s database of PCB designs built in CR-8000. Over time, it mimics human routing, with channels organized in logical ways. Smart placement is next, at an undisclosed time.

According to Bob Potock, vice president of sales and marketing, Zuken will add IPC-2581 capability as part of the next-generation Dynamic Brain, allowing designs from other ECAD systems to be incorporated and learned.

The first two stages are working up to Autonomous Brain, a goal-based utility that the product designers, including Miller, say will use text-based inferencing whereby it detects descriptions of different parts of boards. According to Miller, four functionality levels will be used to inform local and planning decisions.

The system, notes Steve Watt, manager of PCB engineer, can learn from both good and bad designs. “The brain can be untaught if it is sent a dirty design,” he said. Zuken has tested it on about 100 designs, most of the high-speed, digital variety.

Adds Miller: “PCBs are complex. They involve numerical data, geometrical data, the layers in the board, text, constraints … Autonomous Brain is multi-modal; it combines all of these data and extracts the designer’s intent.”

With designers in high demand due to the aging out of many veterans and the length of time and amount of knowledge it takes to develop expertise, some of the concerns about AI replacing humans are eased. But can AI-based tools be realistically used in anything but local environments? Zuken is still working through the issues of cloud-based system, as users point to security concerns. (Miller will be among a group of experts tackling this issue on a free panel session titled AI in Electronics: What Can We Expect? on Sept. 20 at PCB West.)

And how are time-based licenses affected? Miller indicated it takes about five days to learn to use AIPR. But once mastered, Zuken tests showed it eliminated autorouter setup time, and cut autorouting time to 30 sec. from 15 min. Potock noted the conundrum of issuing licenses for products that, on paper, reduce the time of use from hours or days to mere seconds. At this time, it appears Zuken will make AIPR available as a perpetual license.

Given the broad industry resistance to using autorouters, it remains to be seen how tools like AIPR (and others, which are coming right behind) will be integrated into general industry use. That said, the trend in board design is away from the traditional dedicated specialist, toward layout and placement being a small function of engineers’ overall responsibilities. That shift may finally tilt the field toward automation, and if Zuken’s vision is correct, even near-complete abdication to the machine.

Zuken will exhibit AIPR at the PCB West exhibition on Sept. 20 (show hours are 10 a.m. to 6 p.m.) at the Santa Clara (CA) Convention Center. A webinar is planned for November.

Acceleration Factors in Life Testing of Electronics


You are the project manager for a PCB that must function in an environment from -10° to 80°C. The PCB will experience one thermal cycle per day in this range in its application. It must function for 20 years. The customer requires less than a 5% failure rate. You want to perform an accelerated test to duplicate this experience in less than 2 months. Your thermal cycle chamber can cycle through -20° to 140° in 4 hrs, or 6 cycles in one day. So, in the field, the board will experience 365.25 days/year x 20 years = 7305 days, or cycle at one cycle per day. Your chamber can provide 6 cycles/day x 30 days/month x 2 months = 360 cycles in two months.

In the book Practical Reliability Engineering, author Patrick O’Connor proposes an acceleration factor (p. 334). Using this formula, we can calculate the acceleration factor to be 23.67. Therefore, 7305 field cycles will be 309 lab cycles. See Figure 1.

Figure 1. The calculation for the number of lab cycles to be equal to the number of field cycles.

The experiment is performed in the lab for 360 cycles on 100 samples. Of the 100 samples, 3 fail at thermal cycles below 309. These samples failed at 303, 305 and 307 cycles. Using confidence intervals on portions, we see that the 95% confidence interval is 6.4%, slightly higher than the 5% we had hoped.

Figure 2. The confidence interval on portions to calculate the 95% confidence limit of projected failures

We will need to perform root cause failure analysis to understand what causes the failures and take corrected action.

Add Wisconsin to the List of Failed Foxconn Bettors

The ink was barely dry on the lawsuit filed by Lordstown Motors against would-be savior Foxconn when the next round of news hit: the world’s largest ODM/EMS company is pulling out of Wisconsin.

If we go back to 2019, we will recall Lordstown opened the doors of its plant, formerly owned by GM and seen as critical to its hometown’s economic future, to Foxconn, which came bearing (the promise of) much-needed cash. In return, the ODM was to obtain access to Lordstown’s electric vehicle technology, which Foxconn sought as it reportedly focuses on building electronics and other products for what is seen as the future platform for individual and fleet transportation.

That dream ended in a crash, unfortunately but unsurprisingly. The investment never really materialized, Lordstown went bankrupt, and the winners will be the lawyers.

Some 30 miles south of Milwaukee, Foxconn’s much-ballyhooed splash into the Wisconsin cornfields is resolving with the sale of its 315-acre campus to Microsoft.

That’s a far cry from the $10 billion in investment and 13,000 jobs the company forecast — and lots of politicians touted — as longtime homeowners were hit with eminent domain mandates to make way for the 200,000 sq. ft. plant. Some $500 million of taxpayer money later, the prairie landscape is left with a mostly vacant shell. Likewise, company plans to build innovation centers in Madison, Milwaukee, Green Bay, Eau Claire and Racine have mostly been shelved, and the properties are going on the block

What both deals had in common was that they took place in states that of late are highly contested in federal elections. That’s no surprise: Foreign companies have often (always?) tried to influence the outcome of US elections to suit their strategic interests. (The constraints foreign entities should have on such maneuvers, if any, are for others to decide.)

Experienced bettors know when to fold their cards, however, and Foxconn is well-known for exiting the table when it doesn’t like the stakes. When the trade winds blew cold, the company headed for warmer climes.

So a shout out to Georgia, Arizona and Nevada, among others: If Foxconn comes calling, look hard at the cards before asking for a hit.

Online Component Market Ideas Never Die, But Can They Prosper?

More than 30 years ago, one of the first stories I reported on in the electronics industry was a startup whose founder wanted to create a marketplace for electronics components.

Called FastParts, the idea was based loosely on the US stock exchange. Sellers of excess parts could come together with buyers, and FastParts would act as the intermediary — much like the NYSE — providing a trusted guarantor of one company’s inventory and another company’s monies.

Depending on your perspective, founder Gerry Haller was either ahead of his time, or a solution in search of a problem. FastParts never panned out, but over the years we’ve seen several other companies attempt the same thing.

Today, the supply chain has rebounded more or less back in balance after the Covid shortages. In fact, there’s probably more inventory than buyers right now. Right on queue, another startup has entered the fray, offering safe harbor for buyers and sellers.

I’m not entirely sure what separates BidChip, the latest entrant, from its predecessors. But I do know this: Sooner or later, Amazon will recognize that the electronics components industry is one of the largest in the world and jump in with its both of its very oversized feet. And when that happens, will any of the others be left upright?

Concern for Intermetallic Thickness Growth in SAC Solder Joints in Harsh Service Environments


The temperature for electronics in a modern automobile can be higher than 125°C. These high temperatures raise the concern of copper-tin intermetallic growth in solder joints.

Often, we don’t think about the fact that even room temperature is a considerable fraction of the melting temperature of tin, e.g., 293K/505K = 0.5802. A reminder that we have to use the Kelvin scale when making these calculations. However, 125°C is 0.788 of the way to tin’s melting point. This temperature is the equivalent of a blacksmith’s wrought iron being at 895°C. Figure 1 shows a blacksmith’s forge temperature chart. Note that 895°C is beyond red hot.

Figure 1. A Blacksmith’s forge temperature chart

So, what is SAC solder’s copper-tin intermetallic growth at 125°C as a function of time? Fick’s law of diffusion tells us that the growth of the intermetallic, D, is given by:

D = (k(T)t)^0.5    Eq 1.

Where k(T) is a temperature dependent growth rate constant and t is time. Siewert etal[i] performed experiments in which D was measured for various temperatures and times for SAC solders. Following Siewert’s lead I will use time in hours. By using their data in their Figures 2a through 2c for SAC solder, I was able to plot k in an Arrhenius graph, see Figure 2.

Figure 2. An Arrhenius Plot of Siebert’s Data

From Figure 2, we see that Ln k = -6784.7/T + 14.81 or k = exp (14.81)*exp-(6784.7/T). So, at 125°C or 398°K, k = 0.1068. Using this value of k, we can plot D as a function of time. The results are in Figure 3. Note that both scales are logarithmic. In 1,000 hr. (42 days) the intermetallic has grown 10 microns. In three years, it hits 53 microns. We should be cautious, as Siewet’s data has error bars. But, my sense is that these projections are within a factor of two.

 Figure 3. Intermetallic Growth as a Function of Time at 125°C in SAC Solder. 

What is the effect of these thick intermetallics in a harsh auto environments? No one knows, but I would encourage someone to perform some experiments to find out.  


Dr. Ron

[i] Siewert, T. A. etal, Formation and Growth of Intermetallics at the Interface between Lead-Free Solders and Copper Substrates, IPC Apex, 1994.

AI Will Not Physically Destroy Civilization

You have undoubtedly heard in the news that some predict AI will destroy civilization. Even the “Godfather” of AI, Geoffrey Hinton has quit Google and now feels compelled to warn of AI’s risks.

I recently spoke on this topic at Bio 2023 in Boston. I don’t want to minimize the stunning advances in AI as displayed recently in ChatGPT.  But, its threat to civilization is at worst nuanced.

However, those of us in the teaching world are concerned of the impact of ChatGPT in education. It can write quite good papers on any topic, although errors are common. However, its success in tackling exams is nothing short of stunning. ChatGPT can pass the bar exam for lawyers at the 90 percentile, ChatGPT4 can also pass a wide variety of standardized tests such as SATs, APs, GRE’s and even a test for Sommeliers! These skills of AIs like ChatGPT raises the concerns of academic cheating and the hindering the learning of our youth.

An article by the New York Post sums up these types of concerns: “Long known for his warnings on the potential dangers of AI.” Tesla CEO Elon Musk on Monday cautioned that even a “benign dependency” on these complex machines can threaten civilization.” (NY Post May 2, 2023)

Another concern RE AI is crime. Criminals are very clever and will use AI to scam people among other things. One way scamming is done is through deepfakes. A typical deepfake is a digital file of a person’s voice or video image that is fake. There is no end of ways that criminals can use deepfakes to extort money.

So, the latest AI technology is indeed unsettling. However, there is one area in which AIs are utter failures and likely will be for generations: The Physical Embodied Turing Test. This test would essentially challenge an AI robot to assemble something like IKEA furniture from a kit with written instructions. The state of AI development is so far behind in this regime that it makes this task science fictional. In 2019, my then 8 year-old grandson, Nate Su, assembled the Apollo Spacecraft’s 1969 parts, see Figure 1, in 4 hours. No AI can come close to doing this. For AIs to be a real physical threat to humanity, significant advances would be required in interacting in the physical world.

Figure 1. Eight year old Nate Su assembled the 1969 parts of the Apollo rocket in 4 hours. No AI can come close to this feat.

One of the reasons AIs performs so poorly in the physical world is that they have no body. So much of human’s interaction with the physical world is through our bodies and our senses of taste, touch, sight and sound. In addition, humans have years of context about the physical world that an AI Robot would have to learn. As an example, as I write this post I can look out into my living room and see the hard wood floor, covered by carpets, the furniture, our Mumford fireplace, the TV, the phone, and on and on. Each of these items have a long story connected with them. For an AI to navigate our physical world, it would need to “learn” about the myriad aspects of it.

So, don’t have any concern that an AI robot like M3gan (Figure 2.) is on the horizon. Even more humbling to the AI world is Steven Pinker’s adage that no AI can empty a dishwasher.

Figure 2. Robots like Megan will not be on the horizon for decades, if ever.


Dr. Ron

Minimizing Graping


This post is an excerpt on graping from Indium Corporation’s The Printed Circuits Assemblers Guide to Solder Defects.


The growth of personal electronic devices continues to drive the need for ever-smaller active and passive electrical components. This miniaturization trend, together with the demands for RoHS-compliant Pb-free assembly, has created more challenges, including the graping effect.

As a solder paste deposit decreases in size, the relative surface area of exposed solder particles increases, and the amount of available flux to remove surface oxides decreases. Compounding this is the additional heat necessary to reflow most Pb-free solders, resulting in a formula conducive to producing the graping phenomenon. During the heating process, as the flux viscosity decreases and begins to spread downward and outward, the solder particles are exposed at the top of the solder paste deposit. If there is no flux in proximity, these solder particles may become oxidized when the solder paste enters the ramp or soak stage of reflow. These oxides will inhibit the full coalescence of the particles into a uniform solder joint when the solder is liquidus. The unreflowed particles often exhibit the appearance of a cluster of grapes, as can be seen in Figure 1.

Figure 1. The graping effect.

Stencil Printing

The area ratio (AR) is a critical metric in successful stencil printing. It is defined as the area of the stencil aperture opening divided by the area of the aperture sidewalls. Figure 2 shows a schematic for square/rectangular and circular apertures. A simple calculation shows that the AR is simplified to the diameter (D) of the circle divided by four times the stencil thickness (t) or AR=D/4t. Somewhat surprisingly, the result is the same for square apertures, with D now equal to the sides of the square. For the AR of a rectangular aperture, the formula is a little more complicated: ab/2(a+b)t, where a and b are the sides of the rectangle.

Figure 2. Aperture schematics for rectangular and circular apertures.

It is widely accepted in the industry that in order to get good stencil printing, the AR must be greater than 0.66. Experience has shown that if the AR <0.66, the transfer efficiency could be low and erratic, although this has gotten better with advances in solder paste technology.

Transfer Efficiency

Transfer efficiency, another important stencil printing metric, is defined as the volume of the solder paste deposit divided by the volume of the aperture. To accommodate fine-feature stencil printing, it is not uncommon to look at solder paste that incorporates finer powder in order to optimize the printing process. However, as the size of the powder particles within the solder paste decreases, the relative amount of surface area exposed increases. With this increase in surface area, an increase in total surface oxides is also introduced. This increase in surface oxides requires the flux chemicals to work even harder at removing the oxides and protecting the surfaces of the powder, component, and board metallizations during the entire reflow process.

On a 3mil-thick stencil, the AR for a 6mil square aperture is the same as the AR for a 6mil circular aperture: 0.50. However, when comparing the two, the volume of the square solder paste deposit is greater (~108 cubic mil) than the circular deposit (85 cubic mil). The additional solder paste volume provided by the square aperture may help reduce graping. Of greater importance, though, is the increased transfer efficiency provided by the square aperture. The square aperture design provides more consistent transfer efficiency, further reducing the potential for graping as inconsistent deposits could mean less volume.

SMD vs. NSMD Pads

Results from solder masking experiments have shown that the graping effect is less prevalent for the solder mask defined (SMD) pads. It is believed that the solder mask provides a barrier (dam), restricting the spread of the flux during the heating process, and increases the potential availability of the flux to remove oxides and protect from further oxidation. The solder mask can also act as a barrier to protect the solder paste powder particles in close proximity from further oxidation.

Water-Soluble vs. No-Clean

No-clean flux chemistries are generally rosin/resin-based (hereafter referred to only as resin) formulas. Because resins are not very soluble in the solvents used in water-soluble flux chemistries, they are typically replaced with large molecular compounds, such as polymers, in water-soluble fluxes. The activator(s) within the flux chemistry removes the current oxides on the joining surfaces, as well as the solder paste powder particles within the solder paste itself. Further oxidation/re-oxidation does occur during the heating stage. Whereas the resins in no-clean fluxes are excellent oxidation barriers and protect against re-oxidation, the lack of resins in water-soluble chemistries cause them to fall short in terms of providing oxidation resistance.

Hence, for the same reflow profiles—though water-soluble chemistries are generally more active—the lower oxidation resistance of water-soluble chemistries makes them more sensitive in long and/or hot profiles, increasing the potential for graping defects.

Ramp-To-Peak vs. Soak

For many years, the “soak type” reflow profile was quite prevalent. Over time, however, focus has shifted to ramp-to-peak (RTP) as the preferred reflow profile. Contributing to this shift is the higher reflow process temperatures associated with Pb-free solders, as well as the need to diminish the total heat exposure of the smaller paste deposits and temperature-sensitive components and board laminate. Another benefit of the soak profile is its utilization to reduce voiding. However, it is not as effective with Pb-free solders, due to the increased surface tension of Pb-free solders and the higher temperature used to reflow them.

To minimize graping, a reduced oven time is better, provided you use the same time-above-liquidus (TAL) and peak temperature, see Figure 3. The soak profile typically produces more graping than an RTP profile. The graping effect is exacerbated as the total time in the oven increases. Decreasing the total heat dramatically decreases the graping effect. A ramp rate (from ambient to peak) of 1°C/second is commonly recommended, which equates to approximately 3 minutes, 40 seconds to a peak temperature of 245°C.

Figure 3. Typical reflow Pb-free profiles.


To reduce the graping effect, it is vital to ensure an optimal printing and reflow process. Using the guidelines provided for the area ratio and good process/equipment setup will ensure good transfer efficiency. Though the area ratio for circular and square aperture designs may be equal, the potential for graping increases with circular aperture designs due to decreased paste volume and decreased transfer efficiency.

From a reflow standpoint, decreasing the total heat input will decrease the likelihood of the effect. Using an RTP-type profile with a ramp rate of ~1°C/second is suggested.

Material factors also influence the outcome. The observance of graping increases as the solder paste particle size decreases and the area of surface oxides increases. Water-soluble solder paste chemistries do not provide the oxidation barrier that resins do for no-clean chemistries and are more prone to the graping effect.


Dr. Ron

Response to Pause: A Critical Solder Paste Parameter


Solder paste is arguably the most highly engineered material in electronics assembly. It has many properties that must be favorable for its good performance. It must provide a well-defined solder paste deposit that resists cold and hot slump. The paste must provide adequate tack to hold the components to the PWB. As it travels through the reflow oven, the flux must clean off any oxides on the PWB pads and as the temperature increases, the oxygen barrier in the flux must protect the solder particles from oxidation.

There is one solder paste parameter that can make quite a difference in productivity: response-to-pause (RTP). There are times when the assembly line must be “paused.” An example would be when loading components on the component placement machines. During this pause time, some solder pastes will stiffen. When this happens, the first stencil print must be discarded. Cleaning the paste off the stencil can take up to ten minutes. If this process is performed several times a day, the lost production can be significant.

A good solder paste should be able to remain in a paused position (i.e., not being printed) on the stencil for more than an hour without significantly affecting its print performance. As mentioned above, pause situations occur when an SMT line needs to be stopped to replenish components on placement machines or for minor maintenance issues, for example. However, some pastes “stiffen” when printing is paused. This undesirable characteristic is called poor response-to-pause. Figure 1 shows the volume of solder paste deposits for three solder pastes as a function of pause time. In this experiment, the solder paste was placed on the stencil directly from the paste jar without mixing. Note that solder paste 3 has an initial printed volume of only 5300 mils3. In just three more prints it goes up to 9100 mils3. After pausing for one hour, solder paste 3 plummets to 7500 mils3. Note that solder paste 2 is much more consistent in the volume of the solder paste deposits, and solder paste 1 is the best.

Figure 1. Response-to-Pause Measurements of Three Solder Pastes.

Figure 1. Response-to-Pause Measurements of Three Solder Pastes.

If an assembler uses solder paste 3, they may have to reject the first PWB printed after a pause. Typically, this situation would require the assembler to wipe the board clean after the first print after the pause and reprint it. This operation would take several minutes.

Several minutes doesn’t sound like a big deal. However, I have worked with engineers to assess the productivity cost of this production time loss. In one study we found a productivity loss of 7%. For instance, if the assembly line was able to produce 10,000 PCBs within a certain time period with a solder paste that had good response-to-pause, it would only produce 9300 PCBs if the response-to-pause was like that of solder paste 3. This 7% productivity loss is due to the lost time performing the reprints after pausing.

SMT assembly has been around for about four decades. So, you might think that all solder pastes would have good RTP. Sadly, this is not the case. Therefore, good RTP is one of the first performance metrics to measure when evaluating a solder paste.


Dr. Ron

So Long, Mate!

Sad news: Andy Kowalewski, a longtime friend and speaker at PCB West, passed away Feb. 4.

Andy was hugely popular among his PCB design industry colleagues. He was instrumental in forging the IPC Designer Council ties between Australia and the US. And his knowledge was only surpassed by his charm and never-ending kindness.

He will be missed.