And the Race Goes On

AUP package The race for the smallest part is still going strong. That and the fact that basic logic gates are still with us is affirmed quite well with a new set of chips from NXP. The 74AUP2G00 is a dual two-input NAND gate in a no lead XSON8 package at just 1 x 1.35mm. That’s not the scary part. The scary part is the lead pads under the part are 0.15mm wide and just 0.35mm pitch center to center. That’s 0.0059″ and 0.0138″ respectively. The gap between the pads is 0.2mm (0.0078″).

To put that in a little bit of perspective, an 0201 passive component is 0.024″ x 0.012″. An 01005 is 0.016″ x 0.008″.

Above is a land pattern for the part with an 0201 bypass cap next to it. The trace going from the pin to ground (Pin 4) is an 0.008″ trace. The trace going to VCC (pin 8) is 0.006″. The via is a pretty standard 0.024″via. As you can see, an 0.008″ trace and space isn’t going to do for a board with this size of part on it. Even 0.006″ is really a bit too big.

Duane Benson
La de da de de, la de da de da