Bypassing 2.5D

Did Nvidia’s announcement that it would use 3D packaging with silicon-through-vias on some forthcoming Pascal graphics processors to make more memory available with minimal delays signal the start of a general acceptance of stacked memory chips?

IPC Apex Expo was the best in many years. Attendance was good, both in the conference as well as on the show floor. Even Thursday morning saw potential buyers visiting exhibitors in their booths. Capital equipment buyers were twice as optimistic as in the prior year — about 65% stated that they planned to buy equipment this year versus about 30% last year. Exhibitors stated that they were making sales and getting commitments for future trials in their booths during the show — event though there was little in the way of new systems to be seen in the hall. One independent equipment sales rep stated that he had more customer meetings at this show than at the five previous events combined.

New product introductions and improvements abounded. EarthOne Circuit Technologies Corporation (dba eSurface Technologies) created quite a stir with its sponsorship of the Tuesday luncheon to announce its new additive printed circuit board process.

Six OEMs responded to the IPC’s effort to get them more engaged at the management level. The Ambassador Council held its first meeting to explore how it could provide help to further the knowledge and success of IPC members. The executive management meetings’ programs were excellent but still failed to bring in more than a handful of bare board fabricators. Counterfeit components was one of the hot topics throughout the event.

On the other hand, a number of historic names (Christopher Associates, Multiline) were missing from the show — victims of the business conditions and America’s continual decline in the bare board market as well as direct incursions by foreign capital equipment producers. Some exhibitors were still introducing their “new” systems and processes after three or more years of failing to gain traction. However, it warmed my heart to see the resurrected Dynachem name and logo back in America in Osvaldo Novello’s booth, Automatic Lamination Technologies S.R.L.

The IPC event has appeared to have morphed into an analog of the old Nepcon West in terms of massive entertainment activities. The major corporate exhibitors not only took large booths but also used to arrange major hospitality events, receptions, and cruises which captured many of the show attendees. They spent hundreds of thousands of dollars at Nepcon. This put the smaller exhibitors at a distinct disadvantage.

When the IPC established its first trade show it decided to level the playing field a bit for the smaller exhibiting members. It banned major hospitality events during the show that would take attendees away from the event. Some companies that violated this rule were even penalized by having their chance to select the following year’s booth moved to the last position. The IPC arranged for cruises (in San Diego). It produced major galas with music, food, entertainment, and other activities. It solicited sponsors — who received credit for their participation. The price for admission to the event was reasonable. Many companies bought tickets for their customers. It was a great night for all.

But, things have reverted. Companies with deep pockets have already started to reserve ballrooms, night clubs, and to plan other major events for IPC Apex Expo 2015. I do not think that this is a good trend.

Bob Black of Juki Automation said that sales closed during the first two days of the show actually “more than paid” for the show. He said that although January was a bit slow, February sales were strong and he expected March to also be a good month.

Chris Fussner of Yamaha (TransTech) stated that he expected a good year in 2014 as his American distributor organization achieved a positive cash flow in second year (2013).

Don Walsh stated that Ueymura had a record year and a strong start in 2014.

Nihon Superior’s Tetsuro Nishimura said that his booth was busy throughout the show and that he was glad that he came. He’ll be back next year to exhibit with the IPC for the 15th time.

OMG’s Mike Carano (admitted to the IPC’s Raymond E. Pritchard Hall of Fame, the IPC’s highest honor, during the awards luncheon) stated that his company has now captured a 30% share of the North American market for its products.

Dr. Bill Elder introduced Maskless Lithography’s (MLI’s) direct imaging system for liquid photoimageable solder masks (LPISM).

Crunch time

Early reports from the CPCA show state that it is a “disaster.” One of the major exhibitors said that no one came to their booth on Day 1, and only a dozen or so – but no buyers – on the second day. Another stated that Day 1 was awful and that Day 2 was a bit better, it was just terrible in terms of attendance. Semicon China held in Shanghai at the same time was reported to also have experienced the same malaise — a dearth of customers, prospects or visitors of any type.

Can the international uncertainty be the cause? Can the economic woes and diplomatic strife in the world be the reason? Could the international cultural differences and distrust as shown through the investigations of the disappearance of Malaysian Airlines flight 370 be at fault? Are the rapid changes in the electronics industry coupled with continued closures and consolidations be the reason? Could it be that potential buyers are tired of sending armies of their troops to exhibits to see much of “the same old stuff?”

Do these events need to change for today’s and tomorrow’s technology, markets and products? Is the gravitation of business to fewer larger enterprises at fault? If so, how? We believe that ALL of these — and more — are at fault. At the same time, we note that technical conferences, which do not need to draw volumes of visitors to consider them successful, generally continue to attract members of their particular buying public.


Living La Via Loca

I got an email a few weeks back from one of our customers who is with a semiconductor manufacturer for whom we make evaluation boards.  He asked some good questions that I answered, of course, and I thought this information may be useful to others, too.  Here is what his email said:

Hi Judy, We received the boards today… and they look gorgeous!  And of course it leads to a question….. not a negative, not an “inquiry” style question….

One thing that caught my eye was how “flush” the board surfaces were.  I wasn’t able to identify a single via on the front or back surfaces of the board…. and (education time) I had an Apps Engr point out that I could see the via plugs by looking at the edge of the EVB.  So I want to understand more about the via fill process, and whether there are different options that influence cost and lead time.

I will share with you my brief answers, which are not overly technical. However, I will follow my comments with a link to a very good in-depth paper from Michael Carano of the Electronics Division of the OM Group on this subject. Unfortunately once you start talking about via filling and plugging it is a bit like opening a big can of worms!

First of all, a semantics lesson:  There are two methods of filling via holes—one is via “filling” and the other is via “plugging.” Via hole filling refers to the non-planer filling of plated through-holes. Via hole plugging refers to the planarization of blind and buried vias, as well as through holes. Via hole plugging pertains to HDI and microvia designs.

(In the case of the above customer they requested the through-hole vias to be plugged with conductive  ink that would facilitate a connection from the front to back sides).

Once the conductive ink has been applied to the holes, the conductive ink must be cured. After curing some of the cured material will protrude from the holes leaving a small bump or “nail-head.” At this point the board must be “brushed” to flatten this protruding bump, with micro precision, to remove the excess material without removing any material from within the via hole. The brushing process must not damage the knee of any unplugged holes. This requires the use of a very flat working surface and special brushes. In some cases there may need to be an additional final cure for hardness. (UV)

Getting back to our customer, we took all these steps to properly fill, cure and planarize the plugged vias. Afterwards, these boards went through final outer layer pattern plating, which further erased any evidence that the plugged vias were present.  This made it impossible for our customer to detect any sign of the plugged vias (unless they peered through the side of the board into the substrate where they could see the front to back plugs). I think they were a little worried we forget to plug them at first glance!

As far as how filling verses plugging vias influences cost and lead time—the HDI via filling does take some extra time and TLC and thus raises the cost, and may or may not affect the lead time. Usually you must allow for one full day to complete the via plugging process.  Obviously if you need a quick turn, the lead time would be affected. However, if the lead time was standard, it probably wouldn’t make much of a difference. It stands to reason that the quantity also comes into play in regards to time and cost.

Thank you, Bill for asking these questions—they were good ones! We appreciate your kind words and commitment to our partnership. We are thrilled you think our boards are “gorgeous!”

I would also like to thank Michael Carano for his expertise and outstanding paper on the subject of filling and plugging vias that can be found here: