The QFN (quad flat pack, no leads) package can no longer be considered exotic. It was when I first wrote about it a decade ago, but not anymore. In fact, with the wafer-scale BGA, it’s one of the more common packages for new chip designs.
Not all QFNs come with an exposed metal pad underneath, but most do, and that can cause problems with reflow solder. The pad itself isn’t the problem, but improper solder paste stencil layer design can be.
The default stencil layer in the CAD library footprint might have an opening the full size of the metal pad. If that’s the case, modify the footprint so that there will be 50% to 75% coverage with solder paste (Figure 1). If you don’t, it may result in yield problems. With a 100% open area, the likely result is too much solder in the middle. The part will ride up, or float, and may not connect with all of the pads on the sides of the part.
Figure 1. The optimal QFN footprint will have 50% to 75% solder paste coverage.
Figure 2 shows a stencil with too large an opening in the center, a segmented paste layer in the CAD footprint, and the resultant segmented stencil.
Figure 2. Stencils shown with too large an opening in the center (left), segmented paste layer (center), and the resultant segmented stencil (right).
You may note that I said to shoot for 50% to 75% coverage and ask: “Well, is it 50% or 75%? What gives?”
True, that is a bit of ambiguity. Anything in that range should be fine for prototype boards, however. If the assembly is headed for volume production, work with the manufacturer to tweak the design for best high-volume yield.
The good news on this front is that many QFN manufacturers and parts library creators have taken notice. It’s far more likely now than it was 10 years ago to find a datasheet correctly illustrating this, and footprints created correctly. But, always check your footprints to make sure.
Patty was just dropped off at O’Hare airport after finishing a 3 day workshop on Lean Six Sigma statistics, design of experiments, and statistical process control. Interestingly, the students were lawyers. In recent years more and more service-based organizations were adopting lean Six Sigma and it was a long time since Patty had taught such a workshop to engineers. She noted that although the lawyer’s math skills were a bit rusty, they were very good listeners and picked up the math behind lean Six Sigma topics very quickly.
After paying the cab driver, she entered the terminal and went to see an agent. She was early enough to get an early flight home, so she had called the people at the online ticket agency during the cab ride. They said the change fee would be over $300, she felt that was just too much to pay. She was delighted to see that it was only $75 at the terminal.
She looked at her paper boarding pass and saw that she had more than two hours, just enough time for a relaxed lunch at Wolfgang Puck while she read USA Today. Patty was the only person her age that she knew who enjoyed reading a paper newspaper, she guessed that she picked the habit up from her dad.
The two hours went by quickly and she was standing in line waiting to board the flight to Boston’s Logan Airport. She had now been at Ivy U for a few years and traveled much less than when she worked at ACME. She had forgotten how stressful and unpleasant traveling was. As she stood in line, the man in front of her put his smartphone on the scanner and the scanner could not read the QC code. He and the agent fumbled for a while before they got it to work. This was another place where, in her opinion, paper was still king.
Patty got on board and settled into her middle row seat. She groaned a little bit at how uncomfortable and cramped it was. Patty was reminded of what her dad used to say in situations like this; “I know it is a bit uncomfortable, but just think what the 49ers went through to get to California,” he would tease.
After takeoff, she turned on her laptop. She absolutely had to send some emails, so she signed on to the onboard WiFi. She got sticker shock when she saw that it cost $18.95! Even though Ivy U would pay for it, the high price galled her.
After she finished the emails, a wave of fatigue swept over her and she needed a break. She chuckled to herself when she thought of a recent event. She had taken two of her best teaching assistants (TAs) to lunch and the conversation somehow came to discussing people who hid Jews from the Nazi’s in World War II. Patty mentioned to her two young protégés about an excellent book and movie she read and saw as a teenager, The Hiding Place. The story is about Corrie Ten Boom and her family and how they hid, and hence saved, many Jews from the Nazis in Holland during WWII. Although the movie was made before she was born, it was shown at Patty’s church every few years, for the new sets of youngsters who came along. Patty mentioned to her two superstar TAs that the film was produced by Billy Graham’s organization.
“Who is Billy Graham?” they both asked in unison.
Patty struggled to keep her composure as she explained who he was. How could they not know this? She decided to examine the situation a bit further.
Patty started humming a few bars of Orbison’s most popular song.
“Oh, Pretty Woman,” the boys said in unison.
Patty thought to herself, “Each of these young lads are the best student in every class that they take and yet they don’t know these ‘celebrities’?”
The next day Patty arrived at her office early to meet with Rob and Pete to discuss how the presentations that they were making for Mike Madigan on voiding were coming. Patty had arrived so late the night before, that Rob was already asleep. She did not see him in the morning as it was her turn to get the boys ready for school and he was off early to get in his 90 minutes of exercising. So, they had no chance to discuss the progress of the presentation.
“Pete, your presentation of BGA voiding is terrific. How is my hubby doing on BTC voiding?” she chuckled as she looked at Rob.
“I feel like I’m going to get yelled at ’cause I didn’t do my homework,” Rob said sheepishly.
“Yikes! We only have a few days,” Patty responded. “And I have yet to do my part on using solder preforms to minimize voiding,” she went on.
“I’m only teasing. I have quite a bit of info,” Rob said.
“We have been out of the mainstream for a while and one thing is for sure, voiding is the number one issue among assemblers today. So many people are assembling QFNs and are struggling with voiding. Voiding with some solder pastes can be over 50% of the area,” Rob went on.
“Wow! With 50% voids, think of how poorly the heat is being transfer away for the BTCs,” she looked at Rob and chuckled. “Remember, ‘BTC’ not ‘QFN,’ Patty went on.
“Yes ma’am,” Rob jokingly replied.
“Can you imagine the effect on reliability and field issues with so little heat being removed? The ICs inside the BTCs must be frying” Pete added.
“Voiding at this level has got to be really costly,” Patty mused.
“One of the things that really helped me was that I found quite a few experiments on voiding,” Rob added.
“What were some of the key points?” Pete asked.
“Well, as you might expect, the solder paste is typically the most critical part of the process. Some pastes have voiding lower than 10% with others above 50%,” Rob replied.
“What about the process?” Patty asked.
“Well, the reflow profile can be very important, as is controlling the PWBs and components. But, with the best pastes, it has been found that you can control the voiding content even if you can’t change the reflow profile and the PWBs and components have some issues,” Rob responded.
“Look at the x-rays of poor and good voiding between two pastes,” Rob said.
“What a difference,” Patty and Pete said in unison.
“What about the stencil design and venting?” Pete asked.
“Chris said that stencil design for venting is not as critical as once thought, although a window pane design is usually used,” Rob replied.
Figure 1. The window pane design for the stencil is used to permit venting.
“So it sounds like starting with the best solder paste solves 90% of the problem and adjusting the process, say with the right reflow profile, helps refine the result,” Patty summed up.
With this Rob went off to put the finishing touches on his PowerPoint® slides for his part of the presentation, while Patty started working on her part of the presentation on using solder preforms to reduce voiding.
Two weeks later.
Patty’s mom and dad came for a visit on a Sunday. Her mom had graciously offered to bring a complete Sunday dinner. Patty, Rob and the boys were grateful for the delicious meal. As they began to eat, Patty shared the story of her best students not knowing Billy Graham, et al.
“But, what was even more surprising was that I ended up asking 10 or 20 more students and only one had ever heard of any of these four ‘famous’ people,” Patty sighed.
“It’s your age,” Patty’s mom replied.
Thirty years old was not that far in the rear view mirror for Patty and she really didn’t consider herself old.
“These youngsters were born in the late 1990s, a generation after these people were prominent,” her mom went on.
My prior blog covered the Screaming Circuits Manufacturability Index. It’s something I’ll be using from time to time when discussing new components I run across. I’ve got a few examples to put the numbers into context.
On the low side of the index, we have:
1: Just about anyone could hand solder the part
Examples: Through-hole parts
The SN7400 quad NAND Gate, shown on the right, is a good example. It’s big, it’s through-hole, and if someone has trouble hand soldering it, they really need a few more classes.
Closer to the other end, is a new chip I’ve run across. The Silego GPAK4 is a small FPGA-like mixed signal device. It’s got a number of analog peripherals, a bank of programmable logic, and the ability to configure it up the way you want. Take a look at it below:
This little thing is housed in a 2mm x 3mm QFN package. That’s pretty tiny by the standards of my giant fumble-fingers. I’ve given it a rating of 4.b, on the Screaming Circuits manufacturability index. The number ranking “4” means: “Needs advanced automated assembly technique“, and the letter suffix “b” means: “Typical level of challenge within the number rank.” In other words, right up our alley.
Unless you posses super-human abilities, and maybe lasers in your eyes, you won’t be hand soldering these. You’ll have them assembled by us (or someone with the same technical capabilities as us), where it will be a standard process.
If you do want to put one or more of these in your design, you will want to make (or find) a custom library footprint for your CAD software. Due to the variable length pads, a standard one-size-pad footprint might lead to solder joint reliability issues.
Duane Benson The chips go marching one by one, hurrah, hurrah The chips go marching one by one, The little one stops to suck her thumb Just to see if the solder is lead-free
The QFN (quad flat pack, no leads) has become my favorite integrated circuit package. It’s very compact, yet is easier to use than a µBGA.
µBGAs of 0.5mm and smaller pitch become a bit more difficult and costly with more than two rows of pins. At those geometries, escape routing can involve plugged and plated vias, which add complexity and cost to the fabricated board. QFNs can be almost as small, but have all of the pins exposed around the edges, so there’s no need for escape routing.
One thing that’s important to note is that despite sharing the first two letters (Q and F), QFP and QFN footprints are not interchangeable. We do, from time to time, see boards laid out for one along with the other form packaged part.
Take a look at this PCB layout clip from the Arduino Leonardo. It has both footprints on the board. You can see how much bigger the QFP package is.
They put down both footprints because the Atmega32U4 chip used in the Leonardo sometimes has supply issues in one package or the other. This gives them the flexibility to use either without making changes on the board.
You might consider this as an option if there’s space for a QFP and you are concerned about the availability of one package variant or the other. If you do, there are some very important things to check out:
Make sure the pin-outs match. Some parts vary the pin-out a bit between packages or have extra pins on one or the other.
Make sure the extra space won’t cause noise problems. Generally, bypass caps should be as close as possible to the supply pins. This amount of extra space probably won’t be a problem when using a QFN, but in some designs it might.
Make sure the board won’t be in an environment where unsoldered pads will be a problem. Some harsh environments could attack the unsoldered pads. If that’s the case, consider conformal coat.
Duane Benson We’re always being pushed and shoved by people trying to beat the clock But we like it – it’s what we do
The Freescale BGA part checks in at 1.6 x 2mm. That’s cool and I’m almost always in favor of making things as small as possible, but, as I wrote in my prior blog on the subject, it’s not always possible. The 0.4mm pitch BGA is problematic unless you can spend a lot of money on the raw PCBs, or will have super high volume.
All is not lost, though. You still can use a tiny ARM Cortex M0 part. Just not quite as tiny. That same part also comes in a 3 x 3mm QFN package. You lose four pins (16 vs. 20) going from the BGA to the QFN, but if you can handle that, it’s a very viable option that doesn’t require any exotic circuit board technologies.
A few years ago QFNs were scary, but not so much any more. I’ve designed a few of them in using Eagle CAD. Just be sure to pay attention to the footprint. A 6 mil trace is more than small enough for a 0.5mm pitch QFN.
Duane Benson Strive at all times to bend, fold, spindle and mutilate
Let’s see how Patty is doing with her latest challenge …
Patty had decided to call The Professor and see what advice he had to offer in preparation for her visit to the facility in Sherbrooke, Quebec that the senior management of her company wanted to buy. She was having trouble understanding how it was possible to have 99.5% yield, great uptime, and balanced lines and still have poor profitability. After a short discussion, The Professor seemed like he was ready to sum the situation up.
“Patty, I think you will find that the poor profitability is the result of high rework costs,” he said.
“But, Professor, how can that be when the first-pass yield is 99.5%? There is almost nothing to rework,” Patty replied.
The Professor chuckled, “Keep an open mind,” he advised.
Then he continued, “Don’t worry, you will figure it out in a heartbeat”.
Patty wished she could be so confident. As she was about to say good-bye, she mentioned to him her observations of so many teens being glued to their smartphones during her recent Williamsburg vacation. She also shared her concern for her two sons growing up in this over connected world.
“Patty, the main thing your sons have going for them is that they have you and Rob as parents. You will help steer them in the right direction, I’m sure. Remember to lighten up a little, after all they are only 5 years old,” The Professor chuckled.
As he was about to say good-bye, he thought of something else to share with Patty.
“Say Patty, you remember that, here at Ivy University, we have information sessions with high school students that are interesting in coming to our engineering school, right?” he asked.
Patty thought for a moment and remembered how impressive that was. It was the only university she knew of in which professors would meet with high school students and their families to discuss the benefits of an Ivy University engineering education.
“Sure, Professor, it’s a great thing Ivy U does,” Patty answered.
“Because of this program I have spoken to hundreds of high school students, I have also given presentations to high school students in larger groups. Give me a few moments with a high school student and I can tell if they are Ivy U material,” The Professor stated.
“How is that possible?” Patty asked.
“I look for two signs. The first is if their parents are much more interested than they are, that is a bad sign. The other is that if a high school student finds someone like me interesting, that’s a good sign,” The Professor chuckled and then continued.
“I know, to the typical 17 year old, I will seem like a boring nerd, however, to someone passionate about learning, I will likely be seen as a fecund resource, even if they are only 17,” he finished.
Patty chuckled a little herself, thinking that only The Professor, would use the term “fecund resource.”
Patty said farewell to her mentor and called Pete to make arrangements to leave for the Manchester, NH, airport, about an hour from their office in Exeter.
By the end of the day they were at their hotel in Sherbrooke. They had dinner at a French restaurant and both agreed to try and speak only French. Each of them slipped in a little Spanish inadvertently, a common problem among those who speak several Romance languages.
After a good night’s sleep, they met for breakfast. At breakfast they agreed on a few things:
They would try and speak French at the meeting.
They would discuss using preforms to solve the QFN voiding problem first as they expected this topic to be more controversial.
The profitability problem, they would leave for last as they anticipated that this would take time, but were expecting less controversy.
After a short drive from the hotel, they were at the facility. Pete commented on the logical way that exits were numbered on Canadian highways, by the number of kilometers from a reference point.
As they approached the receptionist, Pete proclaimed, “Bonjour, comment ca va? Nous sommes là pour répondre à Jacques? (Hello, how are you? We are here to meet with Jacques.)
In a short time, Jacques appeared.
“Bonjour Jacques, mon nom est Patty et c’est Pete. Nous aimerions parler en français si c’est acceptable.” Patty cheerfully said. (Hello Jacques, my name is Patty and this is Pete. We would like to speak in French if that is OK.)
“Ah, my friends, French probably won’t work for us. You speak with a Parisian accent, suggesting you learned European French. Our French has many different words, we almost always speak in English with our customers and partners from France,” Jacques responded.
Patty thought a minute and it made sense. Quebec has been separated from France for 250 years, but then it occurred to her that the US and Great Britain were separated for about the same amount of time. Maybe this is why some people say that the US and Britain are two cultures separated by a common language, she thought.
They went to a conference room and began discussing the QFN voiding issue. Jacques presented his data and Patty and Pete gave a presentation on how solder preforms can minimize QFN voiding. Patty gave Jacques a copy of Seth Homer’s paper on the topic. Both Pete and Patty were surprised at how receptive Jacques was to using preforms. It seemed that this trip may be easier than they thought.
“Jacques, is it OK if Pete and I walk around and observe the manufacturing process for a while,” Patty asked.
“Sure, take a couple of hours and then we can go to lunch,” Jacques responded.
So Patty and Pete headed off to see the 3 SMT and through-hole assembly lines. Upon entering the facility, they were stunned to see what appeared to be scores of rework operators. Patty went over to observe more closely. It appeared that right after the PCBs were assembled they were visually inspected. Many of the boards went directly to a rework station. The boards that appeared to pass the visual inspection, went to an in-circuit testing. Most of these boards, also went to rework stations. The so-called first-pass yield was obviosuly measured after all of this repair work.
“Pete why don’t you check out the rest of the processes, I’ll stay here and see if I can get a true first-pass yield count,” Patty suggested.
So Pete went off to observe the other parts of the SMT and though hole processes and Patty stayed and counted boards to determine first-pass yield. After a little more than an hour, they met in the break room to sum up the situation.
“Well, for the hour I was there, 150 boards were assembled on the one line I was watching. The first-pass yield was only 24%,” Patty groaned.
“I can top that!” Pete replied. “They have a pencil pusher,” he chuckled.
Patty choked on her ice tea. As she recovered, she was able to say, “Just like in Mexico?”
“Yep! Same scenario,” Pete responded.
Several years ago, Patty and Pete were at a shop in Mexico, and observed an operator pushing a component, on a board that had exited a component placement machine, with a pencil. The component was out of alignment and the operator was straightening it. No one knew how to program the placement machines to correct for this error.
“Any other interesting phenomena?” Patty asked.
“They use the same paste and print parameters, no matter what the stencil. It’s no wonder their first pass yields are low,” Pete finished.
As they summed things up, they were a little down, as they recalled past adventures when they had to deliver bad news. Patty, then had an idea.
“Pete, why don’t we offer to have you come here for a week or two to help them?” Patty asked.
“Sounds like fun,” Pete replied.
“But we have to get them to agree that first pass yield is measured as the boards come off the assembly line. Without this metric they can’t assess where their processes need improvement,” Patty added thoughtfully.
“And we need to plot the defects on a Pareto Chart to develop a continuous improvement plan,” Pete commented.
Figure 1. A typical SMT Board assembly Pareto chart.
“It is amazing that their line balancing and uptime are so good,” Pete added.
They were both apprehensive as they met with Jacques. They remembered some of the times that folks became hostile when bad news was delivered.
Patty did the best she could to keep it positive. She started with their strengths (uptime and line balancing) and complimented them on how strong these important metrics were. She then shared their “opportunities for improvement” and offered Pete’s help.
“My friends, thank you. What a gracious offer. I accept,” Jacques said gratefully. “I guess the workshops I attended on uptime and line balancing paid off. They were presented by this interesting chap everyone calls The Professor,” he finished.
Patty and Pete were stunned by how well this trip went. They enjoyed a delicious French lunch at a café near the plant, with Jacques. On the trip home they chatted about how important it is to the measure first-pass yield before any rework is done, and to plot the defects in a Pareto Chart to lay the foundation for improving yields. Patty now understood what The Professor meant when he said, “look at the rework costs,” they were reworking before they measure their yields.
Epilogue: Two months later true first pass yield was at 94%. Costs plummeted with less rework and business soared. As a result of the increased business, full employment was maintained. Patty’s company did end up purchasing this facility. In addition, Patty and Pete became fast friends with Jacques.
Note: As always, this story is based on a true incident.
Patty sat at her computer, admittedly a little tired. She had just gotten back after a week’s vacation in Colonial Williamsburg with Rob and their two sons. Even though the boys were only five years old, she had insisted that they go to the historical triangle and get the two young lads started on American history. She and Rob had been speaking Mandarin and Spanish at home and the boys were both trilingual, so visiting Williamsburg was among other things Patty had planned to prepare them for a rewarding and productive life.
OK, maybe she was an overachiever for her sons, but she remembered the profound impact that visiting this historic treasure had on her when she was a young girl. During this visit, the young family alternated days at Colonial Williamsburg, Busch Gardens and Water Country USA. They also ate dinner at two of the historic eateries. Of course, at their young age, her boys enjoyed Busch Gardens and Water Country the most.
She had to admit that the trip left her a little shaken. She saw scores of youngsters mesmerized with their smartphones or tablets while standing in line for a ride at Busch Gardens. More troubling was watching teens texting in Colonial Williamsburg while a character interpreter explained the making of a flintlock rifle or the impact of the Royal Marines taking the gunpowder from the Williamsburg magazine, early in the Revolutionary War.
Patty clearly recognized the profound benefit of electronics, after all, it was her career! However, she was troubled by its overuse, replacing personal human interaction and intellectual pursuits and its luring many children away from playing. She was stunned to go to the park where she grew up, a few weeks ago, and finding no children on the swing sets, slides or monkey bars.
More troubling, was a recent chat she had with the Professor. He told her he was convinced that the likelihood of a high school student getting into an elite university was inversely proportional to the number of text messages they send each day. He pointed out that according to Sherry Turkle in her seminal book, Alone Together, the typical US teen sends 200 texts a day. He went on to explain that if a teen sends that many texts a day, how can they have time to be studying Milton or the rise and fall of Rome, learning calculus, or becoming proficient in any topic needed to get into a competitive college or university? To make the point that better students don’t send many texts a day, The Professor even surveyed his statistics class at Ivy University and found that on average the students there sent only about 20 texts a day.
With all of these conflicting thoughts swirling in her mind, she was startled by Pete coming to the door.
“Nous allons à Québec!” Pete shouted. Patty had to shake her head a little bit to get the cobwebs out.
“Hey kiddo, you look a little tired. Too much vacation?” Pete teased.
“Yeah, we didn’t get home ’til 11:30 pm last night. Anyway, what’s up?” Patty responded.
“Well, while you were away, our beloved senior management decided they might want to buy a company in Quebec, near Sherbrooke,” Pete answered.
“Why will we be going to Quebec if we haven’t bought the company yet?” Patty asked.
“The company has 99.5% first-pass yield, but their financials are not that great, especially return on assets,” Pete replied.
“Looks like maybe their uptime or line balancing may be bad,” Patty commented.
“Their throughput would suggest otherwise, for the three lines they have,” Pete said.
“Hmmm, interesting,” Patty murmured.
“Oh, one more thing. They probably need to be using solder preforms on QFNs in some smartphones. They have a voiding warranty issue.” Pete added.
How can a company have outstanding yield and good throughput and still not be profitable? What about solder preforms? Stay tuned to find out.
As I said, I do everything I can to avoid reusing the package footprint when adding the the parts library in Eagle CAD. The schematic symbol can be a different story though. It still takes a lot of caution, but it’s less risky (in my opinion) than reusing the package footprint.
Eagle v. 6 made some improvements in the way copy and paste works. It’s still a little different from your typical word processor, but it’s not that difficult.
But before I get to that, I want to mention one item that caused me a fair amount of confusion early on. And that’s the way all of this fits together. There are three buttons you will need to worry about. From left to right in the green oval are; the device, the package footprint, and the schematic symbol. In my last post, I pointed out the package footprint and today I’m talking about the schematic symbol.
Really, you only build the footprint and the schematic symbol. Then you connect the two up to create the devices. And, you can build the footprint or schematic symbol in either order, but you have to have them both before the last step (the icon in the green oval with four little AND gates).
If you’re using a chip that comes in a couple of different packages (e.g., DIP28, SOIC28, TSSOP28) you most likely only need to make one schematic symbol. You can make the multiple footprints and connect them up in the device section as different variants of the same part.
There are a few exceptions though. Sometimes QFN, QFP or BGA parts will have a few extra pins. In those cases, it’s generally better to create a different schematic symbol.
Duane Benson This solder paste stencil glows blue when goblins are around
I’ve got the fab order placed with Sunstone.com for my next demo project. The little board is represented here at pretty close to actual size on screen – provided you have a 22″ monitor set at 1680 pixel horizontal resolution. Given that, you might want to click on it to pop up a bigger representation of it. That makes it about 4X life size.
When you do that, take note of the QFN/DFN parts: The processor in the middle, the LiPoly battery charger right between the upper two mounting holes and the RS232 driver in the lower left. I’ve followed my paste layer advice and segmented the paste stencil layer to reduce the chance for float or major voids.
I found a footprint in the library for the big processor in the middle. I just had to modify the paste layer, as shown here. I made the footprint for the charger and RS232 chips from scratch. Neither had anything close enough in the library.
The DFN has a slightly different approach to segmenting the stencil layer. Little squares like I used on the other two chips work just as well, but this is effective as well.
Another thing to take note of is the marking on the LEDs. The original footprint for the 0402 LEDs does have a polarity mark, but it’s one of the types that can easily be misinterpreted or can be difficult to see. The diode symbol put down in silkscreen removes any possibility of ambiguity.
Duane Benson I’m happy I live in a split level head.
A long, long time ago, in a place pretty close to here, picking a form factor was easy. Your CPU came in a 40 pin DIP. Your logic came in 14 or 16 bit dips. You picked resistor sizes based on their current carrying needs. Transistors and other power components got a little more difficult, but not much. It was largely a matter of power dissipation requirements.
Different story now, though. First, there’s through-hole vs. SMT. Then there’s a plethora of options beyond that. So, what really matters? A specific resistor size may come in multiple wattages. Chips come in multiple packages — often from big DIPs all the way down to tiny QFN or BGA packages. Let’s look at a few examples.
Here’s a simple microcontroller: the PIC18F25K22. It’s a pretty typical 8-bit PIC. You can purchase it in four different packages:
DIP, $2.05 each, Qty 100, Tube
SSOP, $1.86 each, Qty 100, Tube
SSOP, $1.90 each, Qty 2,100, Tape & reel
QFN, $1.86 each, Qty 100, Tube
SOIC $1.89 each, Qty 1,600, Tube
SOIC $1.93 each, Qty 1,600, Tape & reel
(DigiKey prices as of the posting date. Some are non-stock items.) There’s also the part presentation to consider; e.g., reel, cut tape, tube.
Next, look at a 1K resistor that might be used as a pull-up. (As listed in DigiKey) through-hole resistors range from 1/20W up to multiple watt packages. SMT parts range from 1/32W up to lots. Simplifying a bit and just looking at 1/4W, you can purchase 0402, 0603, 0805 and 1206 packages. For high volumes, price will be a factor, but for lower volumes, the price difference can be trivial.
If you have plenty of space to work with and you need to build by hand or for some reason need a socketed part, your choice is the DIP. If space is a bit of an issue and you may or may not hand build, then an SOIC is probably your pick. Some people will hand build QFNs and SSOP packages, but that’s not realistic in anything but rare cases.
When size, speed, current or performance need to be at maximums, selection is still not that difficult. You’ll often have far fewer options to choose from at the performance edges. But when there’s headroom all over the place, how do you decide? Why an SOIC over an SSOP over an QFN? Why 0603 over 0402, 0805 or 1206?
Duane Benson Peter Piper picked a peck of pickled PIC packages.